China's semiconductor industry

China's semiconductor industry is the network of wafer fabrication plants, equipment and materials suppliers, chip design houses, packaging and test operations, and state investment vehicles that produce integrated circuits inside the People's Republic of China. It is not spread evenly across the country. Almost all of the productive capacity sits in roughly ten city clusters, each with its own specialisation: Shanghai and Beijing run close to a full stack, Hefei and Wuhan are memory capitals built by provincial and municipal governments, the Shenzhen and Dongguan corridor hosts a set of fabs and tool makers organised around Huawei, Shenyang and Tianjin supply specific categories of production equipment, and Wuxi and Nantong handle packaging and test.

For an encyclopedia of artificial intelligence, this industry matters for a single reason above all others. It determines how much AI compute China can build without American permission. Since October 2022 the United States has restricted the sale of advanced accelerators and the tools to make them, and in November 2025 Beijing was reported to have issued guidance requiring new state-funded data centre projects to use only domestically made AI chips ^[16]. That leaves Chinese model developers dependent on a manufacturing base that can print 7nm-class logic but cannot yet buy or build extreme ultraviolet lithography tools, and that is producing high-bandwidth memory in volumes far below what its accelerator designers would like to ship.

The industry reached a set of milestones in mid-2026 that made its shape legible from the outside. On 27 July 2026 the DRAM maker CXMT listed on Shanghai's STAR Market, raising RMB 57.92 billion (about US$8.6 billion) ^[9] and rising roughly 466 percent on debut, which CGTN reported made it the most valuable China-listed company ^[10]. Days later, trade press reported that a Shanghai state-backed venture had begun limited production of China's first domestic immersion deep-ultraviolet lithography scanners, with the first units earmarked for SMIC, Hua Hong and CXMT ^[13][14]. Both events were widely read as evidence that the localisation programme is working. Both also illustrate its limits: the DRAM champion had not yet brought high-bandwidth memory to volume production ^[28], and the new lithography tool is a rough analogue of an ASML machine from 2008 ^[12].

Why it matters for AI

China's AI laboratories, including DeepSeek, Alibaba's Qwen team, ByteDance and Baidu, have trained their strongest models predominantly on Nvidia hardware acquired before, or in spite of, export controls. The domestic manufacturing base is what would let them stop. Three chokepoints decide whether that substitution is possible.

The first is advanced logic. Every serious Chinese AI accelerator, including Huawei's Ascend line, Cambricon's Siyuan parts, and the GPUs from Moore Threads, MetaX, Biren and Enflame, is fabricated at SMIC on its 7nm-class N+2 process or a successor. TrendForce noted in December 2025 that Biren, Moore Threads, MetaX, Alibaba's T-Head, Baidu's Kunlunxin and Huawei's HiSilicon all mass-produce their high-end products on the same node, and warned that "until SMIC achieves a meaningful breakthrough in both capacity and yields," a large-scale ramp by any one of them is difficult ^[21].

The second is memory. SemiAnalysis argued in September 2025 that logic wafers were not actually the binding constraint on Huawei's accelerator output: the firm estimated that SMIC would need on the order of 20,000 wafers per month to produce millions of Ascend dies per month, a small share of its capacity, while high-bandwidth memory was the real bottleneck ^[28]. On that analysis China had procured roughly 13 million HBM stacks before controls bit, enough for about 1.6 million Ascend 910C packages, and CXMT was expected to supply only around 2 million stacks the following year, sufficient for perhaps 250,000 to 300,000 more units ^[28].

The third is tools. Without EUV, SMIC prints its most advanced layers using deep-ultraviolet multipatterning, which costs die area, yield and money on every wafer. Whether China can close that gap determines whether its accelerator roadmap can follow the same density curve as TSMC's.

The map and what it can and cannot show

Much of the public discussion of this geography in 2026 traced back to a schematic map compiled in July 2026 by Andrew Stokols, an assistant professor of urban studies at Singapore Management University, alongside an essay in his Sinocities newsletter ^[1][2]. The map plots ten hubs, tags each firm by role (equipment, fab, design, packaging, state capital), sizes each node by an estimated 2026 installed fab capacity in 12-inch-equivalent wafers per month, and draws 25 annotated supply-chain linkages between them.

It is a useful roadmap and a poor citation. The page states its own limits plainly: node positions are "schematic city locations, not plant coordinates," capacity figures are estimates, and linkages marked with a tilde are "reported/attributed rather than company-confirmed," with the note that "Huawei-network ownership is deliberately indirect" ^[1]. Its listed sources are the Financial Times, the Wall Street Journal, The Elec, DigiTimes, SemiAnalysis, NBD, the South China Morning Post, 21jingji, Asia Times, Yicai, company prospectuses and US Commerce Department Entity List documentation ^[1].

Several of the most quoted items on the map are in the attributed category, including the claim that Huawei is believed to operate one of the municipally owned Shenzhen fabs for 7nm Kirin and Ascend production, and the suggestion, credited to satellite analysis by The Elec, that one SwaySure fab runs exclusively on SiCarrier tools ^[1]. The capacity estimates also conflict with other trade coverage in places. The map puts YMTC at roughly 200,000 wafers per month across two fabs; TrendForce, reporting on YMTC's Phase III venture in September 2025, put the company at about 130,000 wafers per month with a plan to reach 150,000 ^[27]. This article follows the underlying reporting where the two disagree.

The geography of the clusters

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Three of these are coastal general-purpose clusters and two are inland memory capitals built more or less from scratch by local government. Shanghai is the only one that contains every layer at once: foundries, the etch and cleaning tool makers that supply them, a lithography development effort, and the largest concentration of AI chip designers in the country. Beijing pairs the country's biggest equipment company with a mature-node foundry base and two of its listed accelerator designers. The Shenzhen and Dongguan corridor is shaped by sanctions rather than by industrial logic: because Huawei has been on the Entity List since 2019, the fabs in its orbit are owned by municipal state vehicles rather than by Huawei, which supplies engineering direction and demand instead of equity ^[1][2].

Xi'an and Chengdu are the exceptions that clarify the rule. Both host very large fabs and back-end plants, and almost none of that capacity is Chinese-owned. Samsung's Xi'an complex alone accounts for 35 to 40 percent of the company's total NAND output ^[32], and Intel's Chengdu site is one of its largest assembly and test operations worldwide. China hosts world-class capacity that its own industrial policy cannot direct. The cluster composition in the table above follows the Stokols compilation ^[1]; individual firm-level claims are sourced separately below.

The layers of the value chain

Equipment and materials

The most striking change of the past four years is upstream. Nikkei's 2025 ranking of semiconductor equipment vendors, reported by TrendForce in February 2026, placed three Chinese firms in the global top 20, up from one in 2022: NAURA fifth, behind only ASML, Applied Materials, Lam Research and Tokyo Electron; AMEC thirteenth on the strength of its etch systems; and SMEE twentieth in lithography ^[31]. ACM Research and Hwatsing ranked inside the top 30, and the same analysis estimated that domestically made tools now account for roughly 20 to 30 percent of equipment used in Chinese fabs, up from about 10 percent three years earlier ^[31].

The category coverage is uneven by design. NAURA spans etch, deposition, furnaces and cleaning; AMEC is an etch specialist; Piotech makes plasma-enhanced and atomic-layer deposition systems; Kingsemi is the only volume domestic maker of coater and developer track tools; Hwatsing leads chemical-mechanical polishing; ACM Research covers wet cleaning. Lithography is the hole, and it is the subject of a separate section below.

Washington treated this cluster as a single target. The Bureau of Industry and Security rule published on 5 December 2024 added 140 entities to the Entity List in one action, and the China list reads like a directory of the domestic tool sector: NAURA Technology Group and six regional NAURA subsidiaries, Piotech and four affiliates, ACM Research (Shanghai) and its Beijing and Wuxi arms, the EDA house Empyrean under its Huada Jiutian names, Skyverse, Kingsemi's Japanese subsidiary, and dozens of gas, materials and precision-parts suppliers ^[3].

Foundry logic

SMIC is the pivot of the whole system. TrendForce's fourth-quarter 2025 foundry ranking put it third worldwide by revenue at US$2.49 billion, behind TSMC and Samsung Foundry; Hua Hong Group ranked sixth at US$1.22 billion and Nexchip ninth at US$388 million ^[25]. Those are large numbers in absolute terms and small next to TSMC's US$33.7 billion and 70.4 percent share in the same quarter ^[25].

SMIC's technical position was established publicly in September 2023, when TechInsights tore down the Huawei Mate 60 Pro and found its Kirin 9000s built on SMIC's 7nm N+2 process, a 107 mm2 die that TechInsights vice chair Dan Hutcheson said demonstrated "the technical progress China's semiconductor industry has been able to make without EUV lithography tools" ^[18]. In July 2026 a SemiAnalysis teardown of a third-generation node, N+3, reported a minimum metal pitch of 32.5nm and an estimated transistor density around 113.4 million transistors per square millimetre, above TSMC's N6 at 107.7, achieved with DUV multipatterning including self-aligned quadruple patterning on the tightest layers ^[15]. The same analysis was careful about what density does not buy: the Kirin 9030 built on it was reported to deliver performance comparable to flagship application processors of roughly three years earlier, with a substantial energy-efficiency disadvantage ^[15].

Capacity, not capability, is the live question. The Financial Times reported in August 2025 that Chinese chipmakers were aiming to triple the country's AI processor output in 2026, that one fab dedicated to Huawei's AI chips was due to begin production by the end of 2025 with two more in 2026, and that SMIC planned to double its 7nm capacity ^[19][20].

Memory

Memory is where China has moved fastest. CXMT reached fourth place in global DRAM with an estimated 7.7 percent share of the global DRAM market in the fourth quarter of 2025 and, on TrendForce's account, priced its STAR Market IPO at RMB 8.66 per share for a pre-listing valuation near RMB 579.19 billion, raising RMB 57.919 billion and surpassing SMIC's RMB 53.2 billion STAR Market record from 2020 ^[9][10]. Its prospectus allocated RMB 7.5 billion to upgrading memory wafer lines, RMB 13 billion to a DRAM technology upgrade and RMB 9 billion to forward-looking research ^[9].

YMTC is the NAND counterpart. In September 2025 it established a Phase III vehicle in Wuhan with registered capital of RMB 20.72 billion, holding 50.2 percent against 49.8 percent for a Hubei provincial investment company; TrendForce put its output then at about 130,000 wafers per month, roughly 8 percent of global 3D NAND supply, with a target of 150,000 and a goal of 15 percent of global supply by the end of 2026 ^[27]. On layer count the same report placed YMTC at 270 layers against SK Hynix's 321 and Samsung's 286 ^[27].

The AI-relevant gap is HBM. Huawei's September 2025 Ascend roadmap put self-developed high-bandwidth memory in the Ascend 950PR, scheduled for the first quarter of 2026, with the 950DT following in the fourth quarter, but neither Huawei's internal HBM nor CXMT's has been shown to reach the volumes that Ascend production would need. SemiAnalysis's estimate of about 2 million domestic stacks in a year, enough for a few hundred thousand accelerator packages, is the most concrete public figure ^[28].

Design

The design layer is the best capitalised and the least constrained by physics, since a design house needs engineers and EDA licences rather than fabs. Huawei's HiSilicon anchors it, supplying both the Kirin mobile processors and the Ascend accelerator line. Around it sits a cohort of independent AI accelerator designers: Cambricon, spun out of the Chinese Academy of Sciences Institute of Computing Technology; Moore Threads, founded in 2020 by James Zhang Jianzhong after fourteen years at Nvidia ^[22]; MetaX, whose C600 pairs HBM3e with FP8 arithmetic and was scheduled for volume manufacturing in the first half of 2026 ^[23]; Biren; Enflame, in which Tencent holds 20 percent ^[29]; plus the in-house teams at the platform companies, Alibaba's T-Head and Baidu's Kunlunxin, the latter reporting more than RMB 1 billion of 2024 revenue with external customers at about 40 percent of the business ^[24].

Their exposure to United States controls is uneven. Cambricon and nine related Cambricon entities were added to the Entity List, in a batch of 21 that also included the Chinese Academy of Sciences Institute of Computing Technology and several CETC bodies, in the December 2022 rule that also caught YMTC ^[5], and Biren and Moore Threads were added in a rule effective 17 October 2023 that targeted entities "involved in the development of advanced computing integrated circuits" ^[33]. Being on the list bars them from TSMC, which is precisely what routes them all back to SMIC.

Packaging and test

China is strong in outsourced assembly and test. TrendForce's 2024 OSAT ranking placed JCET third worldwide at US$5.0 billion in revenue, up 19.3 percent, and TongFu Microelectronics fourth at US$3.32 billion, with HT-Tech sixth and the fastest-growing at 26 percent ^[26]. JCET reported record 2025 revenue of RMB 38.87 billion. Advanced packaging matters more for AI than for most segments, because chiplet integration and HBM stacking are where a 7nm die can still be made competitive against a 4nm one.

The financing model

The industry runs on four overlapping pools of capital.

The national funds. The China Integrated Circuit Industry Investment Fund, universally called the Big Fund, was created in 2014, shortly before the Made in China 2025 programme made domestic chip content an explicit national target, and has run in three phases. The third, capitalised at RMB 344 billion (about US$47 billion), began operations on 31 December 2024 under the same manager as the earlier phases, Huaxin Investment Management, with an initial tranche of about RMB 93 billion (US$12.685 billion) directed at materials such as ultra-pure chemicals and silicon wafers and at wafer fabrication equipment ^[17]. That figure is large but not decisive at the frontier: ASML's research and development budget alone was US$4.308 billion in 2023 ^[17].

Municipal and provincial vehicles. These are often more consequential than the national funds because they take controlling positions early. Beijing's E-Town Capital co-owns SMIC's Beijing joint venture; Shenzhen Major Industry Investment Group owns SiCarrier and, according to reporting on the Guanlan sites, the fabs built around Huawei; Hubei's provincial, municipal and district vehicles recapitalised YMTC after the collapse of its former parent ^[1][2].

The Hefei model. Hefei's municipal government is the most cited practitioner of state venture investment in China. It backed the display maker BOE in 2008, the electric vehicle maker NIO in 2020, and co-founded CXMT with the fabless designer GigaDevice in 2016, holding through a decade of losses to the 2026 listing. Officials describe the approach as industrial rather than speculative: "We are not venture capitalists; we are industrial investors" ^[11].

The STAR Market. Shanghai's technology board, launched in 2019, is the exit and the pricing mechanism for all of the above. SMIC's 2020 listing set the board's fundraising record until CXMT broke it in July 2026 ^[9]. The 2025 and 2026 cohort of AI chip listings ran through the same venue.

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Baidu's Kunlunxin filed confidentially for a Hong Kong listing on 1 January 2026, having been valued at around RMB 21 billion in a recent round ^[24].

The constraint that binds: lithography

ASML has never been permitted to sell an EUV scanner to a mainland Chinese customer, and successive Dutch and American rules have narrowed access to immersion DUV as well. Everything else in the localisation programme is downstream of that fact.

The domestic answer is an immersion DUV effort centred on Shanghai Yuliangsheng Technology, founded in 2022 and jointly owned by SiCarrier and the state-backed Chuangkewei (Shanghai) Technology, whose engineering team has since moved into a state-owned vehicle, Shanghai Aishengna, registered with RMB 7 billion of capital ^[12]. SMIC has been evaluating a Yuliangsheng immersion tool since September 2025 ^[13][14]. In late July 2026, The Information reported that limited production had begun, with the first units to go to SMIC, Hua Hong and CXMT ^[14]; Electronics Weekly put the plan at five machines in 2026 and about 20 in 2027 ^[13].

The design did not originate at Yuliangsheng. Asia Times reported that SMEE, the state-owned lithography maker, passed the SSA800 technology to Shanghai Yuliangsheng in 2025 while retaining its own EUV programme, so coverage describing the scanner as SiCarrier's own design is mistaken ^[12]. The specifications are the important part. The tool, designated SSA800, targets 28nm in a single exposure and 7nm or 5nm through multipatterning ^[13]. Asia Times reported analysts describing it as roughly four generations behind ASML, with performance approximating the TWINSCAN NXT:1950i that ASML launched in 2008, and put domestic content at about 70 percent, with Zeiss optics, excimer laser mirrors and the ArF immersion light source still imported ^[12]. Independent analysis by the AI Futures Project in June 2026 placed commercial-scale Chinese immersion DUV in the mid-2030s, against ASML's 98.7 percent share of the immersion market ^[14]. For scale, ASML expected to ship about 130 immersion systems in 2026, with China falling to around 20 percent of its net sales from 33 percent in 2025 ^[14]. A domestic EUV prototype has been reported but remains years from production ^[14].

Five tools a year does not replace a fleet. What it does is establish a second source that cannot be switched off by a foreign regulator, which is the point of the exercise.

Export controls and the Entity List

The manufacturing base has been shaped, layer by layer, by US restrictions.

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The Entity List entry for SiCarrier is worth quoting because it is the clearest official statement of the relationship that the Shenzhen cluster is built to obscure. BIS listed "Shenzhen SiCarrier Technologies Co., Ltd." with six aliases, among them "Huawei Starlight Engineering Department" and "Huawei Starlight Department" ^[3]. The agency's stated rationale for that batch of additions was that the entities "pose a significant risk of contributing to the efforts of Huawei Technologies Co., Ltd., a party on the Entity List, to support China's government's goal of indigenous production of 'advanced-node ICs'" ^[3].

CXMT occupies an unusual position. It is not on the Commerce Department's Entity List, which is part of why it could court foreign customers and list publicly. It is, however, designated a Chinese military company under Section 1260H of the FY2021 National Defense Authorization Act, appearing in the Department of Defense notice published on 10 June 2026 alongside SMIC, YMTC and Huawei ^[7]. Reports in early 2026 that the Pentagon had removed CXMT from that list are not consistent with the June 2026 notice.

Beijing has answered in kind. Guidance reported in November 2025 required new data centre projects receiving state funds to use only domestically made AI chips, with projects less than 30 percent complete told to remove foreign parts already installed; the guidance was reported to cover not only the Nvidia H20 but also H200 and B200 parts that had reached Chinese data centres through unofficial channels ^[16].

The allocation problem

This is the part of the picture that matters most to an AI audience, and it is the part most often flattened in summary.

China has capitalised its AI chip designers at extraordinary valuations. Moore Threads reached a market value above RMB 300 billion on its first day of trading, on 2025 revenue guidance of RMB 1.22 billion to 1.50 billion and expected net losses of RMB 878 million to 1.24 billion ^[30][22]. MetaX drew 5.17 million retail subscribers ^[23]. Biren's Hong Kong retail tranche was oversubscribed roughly 2,348 times ^[24]. Enflame, which holds about 1.7 percent of China's AI accelerator card market in 2025 and derived 83.8 percent of its 2025 sales from a single shareholder-customer, won approval to raise RMB 6 billion ^[29].

The wafers those companies need are, by most accounts, spoken for. TrendForce's assessment in December 2025 was that Cambricon's plan to ship roughly 500,000 accelerators in 2026, including up to 300,000 units of the Siyuan 590 and 690, ran into a foundry constraint rather than a demand constraint, because Biren, Moore Threads, MetaX, T-Head, Kunlunxin and HiSilicon all compete for the same N+2 capacity ^[21]. The Financial Times reported that Huawei takes SMIC's primary 7nm allocation, and that the point of the new dedicated fabs was to free up SMIC capacity so that smaller designers could secure larger shares ^[19].

Stokols frames the result sharply, describing a market-like cluster whose binding constraint is "allocated administratively elsewhere," and characterising the Shanghai listing wave as "efficiently capitalizing firms that cannot get wafers" ^[1]. That framing is his, and it should be read as analysis rather than as a reported fact. The underlying observations are better attested: the capacity is finite, Huawei is first in line, and the equity markets have priced the designers as though it were not.

Two qualifications belong with it. First, if SemiAnalysis is right that HBM rather than logic is the true bottleneck ^[28], then freeing up N+2 wafers only moves the queue rather than clearing it. Second, the software layer is a constraint of its own: Huawei's CANN stack and the various vendor SDKs behind Cambricon, Moore Threads and MetaX do not yet match the maturity of CUDA, which is one reason Chinese labs kept training on Nvidia clusters even as domestic inference deployments grew ^[16][19].

Foreign-owned capacity inside China

A large share of the world's memory output is made in China by companies that are not Chinese. Samsung's Xi'an complex accounts for 35 to 40 percent of its total NAND, and SK Hynix makes about 40 percent of its DRAM in Wuxi and about 20 percent of its NAND in Dalian ^[32]. Micron runs a packaging, test and module plant in Xi'an, and Intel's Chengdu site remains one of its largest assembly and test operations.

The revocation of Validated End-User authorisations, published on 2 September 2025 and effective 31 December 2025, removed the general authorisation that let Intel Semiconductor (Dalian), Samsung China Semiconductor and SK hynix Semiconductor (China) receive controlled equipment without individual licences ^[6]. Reporting at the time said Commerce did not intend to grant licences to expand capacity or upgrade technology at those fabs, which converts them over time into legacy-node assets inside a market that is racing past them.

The practical consequence for AI is indirect but real. If Samsung and SK Hynix cannot upgrade in China, and if CXMT and YMTC keep expanding, the share of global memory made by Chinese-owned firms rises whatever else happens.

What remains unsolved

• EUV. No domestic tool exists at production scale, and the immersion DUV programme is at five units a year against ASML's roughly 130 ^[13][14].
• Optics and light sources. Even the domestic scanner depends on imported Zeiss lenses and ArF immersion sources ^[12].
• HBM at volume. Domestic stacks remain the limiting input for accelerator packaging ^[28].
• Yield economics. Multipatterning at 7nm without EUV raises cost, cycle time and defect risk, and the resulting parts trade efficiency for density ^[15].
• EDA. Empyrean and its peers were added to the Entity List in December 2024 ^[3], and the domestic tool chain does not yet cover advanced node design end to end.
• Software. Domestic accelerators still lack a mature equivalent to CUDA, which suppresses their effective utilisation even when silicon is available ^[16].

Outlook

The realistic near-term picture is a two-track industry. On mature and mid-range nodes, memory, power devices, display drivers and packaging, China is already competitive and getting cheaper, and the main constraint is trade policy rather than technology. On leading-edge logic and high-bandwidth memory, which is where AI training capacity actually comes from, the country can build a meaningful amount of compute, but not as much as its accelerator designers have been capitalised to sell, and not without paying a large efficiency penalty per watt and per wafer.

The three things worth watching are whether SMIC's N+2 and N+3 capacity actually doubles as reported ^[19][20], whether CXMT and Huawei can move HBM from samples to volume ^[28], and whether the Yuliangsheng scanners qualify on production lines rather than in test fabs ^[14]. Each is a measurable event. Together they would determine whether the domestic base can supply a frontier-scale training run, which as of mid-2026 it demonstrably could not.

References

1. ^Andrew Stokols, "China's Indigenous Semiconductor Push: Hubs and Linkages" (interactive map, compiled July 2026). astoks.github.io/chinasemimap
2. ^Andrew Stokols, "China's Chip Cities," Sinocities, 28 July 2026. sinocities.substack.com/...chinas-chip-cities
3. ^Bureau of Industry and Security, "Additions and Modifications to the Entity List; Removals From the Validated End-User (VEU) Program," 89 FR 96830, 5 December 2024 (effective 2 December 2024). federalregister.gov/...idated-end-user-veu-program
4. ^Bureau of Industry and Security, "Addition of Entities to the Entity List, Revision of Entry on the Entity List, and Removal of Entities From the Entity List," 22 December 2020. federalregister.gov/...ist-and-removal-of-entities
5. ^Bureau of Industry and Security, "Additions and Revisions to the Entity List and Conforming Removal From the Unverified List," 19 December 2022. federalregister.gov/...al-from-the-unverified-list
6. ^Bureau of Industry and Security, "Revocation of Validated End-User Authorizations in the People's Republic of China," 2 September 2025 (effective 31 December 2025). federalregister.gov/...e-peoples-republic-of-china
7. ^Department of Defense, "Notice of Availability of Designation of Chinese Military Companies," 91 FR 35189, 10 June 2026. federalregister.gov/...-chinese-military-companies
8. ^FAR Council, "Federal Acquisition Regulation: Prohibition on Certain Semiconductor Products and Services," 17 February 2026. federalregister.gov/...uctor-products-and-services
9. ^TrendForce, "China's DRAM Maker CXMT to Debut Jul 27, IPO to Raise RMB 57.9B, Largest on STAR Market Since Launch," 24 July 2026. trendforce.com/...gest-on-star-market-since-launch
10. ^CGTN, "What CXMT's IPO means for the global semiconductor race," 28 July 2026. news.cgtn.com/...p
11. ^CGTN, "A closer look at the Hefei model through CXMT's breakthrough," 30 July 2026. news.cgtn.com/...p
12. ^Asia Times, "China's DUV lithography still lags ASML by four generations," July 2026. asiatimes.com/...ill-lags-asml-by-four-generations
13. ^David Manners, "Five DUV machines built by Shanghai Yuliansheng to ship this year," Electronics Weekly, 28 July 2026. electronicsweekly.com/...achines-this-year-2026-07
14. ^Tom's Hardware, "China begins mass production of homegrown immersion chipmaking machines in major breakthrough, report claims," 27 July 2026. tomshardware.com/...rsion-duv-lithography-machines
15. ^Tom's Hardware, "SMIC's third-gen 7nm node shows smaller metal pitch than Intel 18A, higher transistor density than TSMC N6 without EUV," 21 July 2026. tomshardware.com/...for-chinese-semi-manufacturing
16. ^Tom's Hardware, "China bans foreign AI chips from state-funded data centers," 5 November 2025. tomshardware.com/...from-state-funded-data-centers
17. ^Tom's Hardware, "China starts Big Fund III spending: $47 billion for ecosystem and fab tools," 8 January 2025. tomshardware.com/...on-for-ecosystem-and-fab-tools
18. ^TechInsights, "TechInsights finds SMIC 7nm (N+2) in Huawei Mate 60 Pro," September 2023. techinsights.com/...smic-7nm-n2-huawei-mate-60-pro
19. ^TrendForce, "China Reportedly to Triple AI Chip Output Next Year, with Fabs Serving Huawei, Cutting NVIDIA Reliance," 28 August 2025. trendforce.com/...g-huawei-cutting-nvidia-reliance
20. ^TrendForce, "SMIC 1H25 Net Profit Rises 35.6%, 7nm Capacity Reportedly to Double in 2026," 29 August 2025. trendforce.com/...ity-reportedly-to-double-in-2026
21. ^TrendForce, "[Insights] Cambricon Remains China's Top AI Chip Startup; Rumored 2026 Triple Output Faces SMIC Limits," 15 December 2025. trendforce.com/...-triple-output-faces-smic-limits
22. ^TrendForce, "China's Largest STAR Market IPO of 2025, Moore Threads, Goes Public on Nov 24, Raising RMB 8B," 24 November 2025. trendforce.com/...-public-on-nov-24-raising-rmb-8b
23. ^TrendForce, "China's GPU IPO Wave Intensifies: MetaX Surpasses Moore Threads in Retail Investor Interest," 11 December 2025. trendforce.com/...eads-in-retail-investor-interest
24. ^TrendForce, "China AI Chipmakers Step Up Hong Kong IPO with Baidu Kunlunxin Filing, Biren HK$5.58B Listing," 2 January 2026. trendforce.com/...xin-filing-biren-hk5-58b-listing
25. ^TrendForce, "Global Top 10 Foundries' Revenue, 4Q25," press release, 12 March 2026. trendforce.com/...20260312-12965
26. ^TrendForce, "Top 10 OSAT Companies of 2024 Revealed," press release, 13 May 2025. trendforce.com/...20250513-12577
27. ^TrendForce, "China's YMTC Launches $3B Wuhan Phase III Venture, Signaling NAND Expansion Ambitions," 9 September 2025. trendforce.com/...gnaling-nand-expansion-ambitions
28. ^SemiAnalysis, "Huawei Ascend Production Ramp: Die Banks, TSMC Continued Production, HBM is The Bottleneck," 8 September 2025. newsletter.semianalysis.com/...end-production-ramp
29. ^Caixin Global, "Tencent-Backed AI Chipmaker Wins IPO Approval," 16 June 2026. caixinglobal.com/...er-wins-ipo-approval-102454788
30. ^China Business Insider, "Chinese GPU Chipmaker Moore Threads Surges 469% on Trading Debut." chinabizinsider.com/...surges-469-on-trading-debut
31. ^TrendForce, "Three Chinese Chip Toolmakers Reportedly Enter Global Top 20 as NAURA Rises to Fifth by Sales," 2 February 2026. trendforce.com/...as-naura-rises-to-fifth-by-sales
32. ^KED Global, "Samsung, SK Hynix lose US waiver on chip equipment for China use," 31 August 2025. kedglobal.com/...ked202508310003
33. ^Bureau of Industry and Security, "Entity List Additions," 19 October 2023 (effective 17 October 2023). federalregister.gov/...entity-list-additions